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 369 Code Snippets

CE028 - dsPIC SMPS Complementary PWM

Microchip Technology

This program sets up the PWM module for complementary mode operation. The PWM1 and PWM2 outputs are configured to produce a 400kHz PWM signal with a duty cycle of 26%. PWM2 is phase shifted by 250 nsec.

About this Code Example

This code example sets up ADC  pair 0 (AN1,AN0) conversion to be triggered  
by software trigger. The Early Interrupt feature is enabled. In this example,
the FRC with Hi-Range is set up to run at  frequency of 14.55MHz. This will
result in Fcy = 29.1 MHz.   The input clock to the ADC  clock divider will be

Tcy = 34.364 nsec               
Time required for one conversion  = 721.64 nsec 

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Release History

  • Jun 15, 2012

    Version: 1.0.0

    First Release to ECS

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  • Current Version:1.0.0
  • Created:Jun 16, 2012
  • Updated:Feb 26, 2015
  • Downloads:3501
  • MPLAB Version:V8.xx or above
  • C Compiler:MCC18 v3.30 or above
  • Development Tools:N/A
  • Supported Devices:N/A

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