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PIC12 Complementary Output Generator (COG)

Microchip Technology

Code example showing the usage of the Comparator, COG, and ADC modules in a PIC12F752 device. The main focus is generating 2 complementary outputs and using the Comparator output to insert a phase delay into the rising edge of the source PWM used as the time base for the 2 complementary outputs.

About this Code Example

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PIC12F752 ADC + Comparator + COG Demo
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This demo uses the PIC12F752 to generate 2 complementary PWM outputs (i.e. same carrier frequency & duty cycle) using the
Complementary Output Generator (COG) module.

The COG outputs are based on a single PWM waveform (using Timer2 to create a ~300kHz carrier frequency, 50% duty cycle square wave)
with fixed dead-band delay for rising and falling edge events.

The Comparator is configured to operate in high-speed mode and generates interrupts on both rising and falling edges:

* Rising edge interrupt: When the (C1IN0+) input goes above the (C1IN-) input, a fixed phase delay will be inserted into the COG outputs.
* Falling edge interrupt: When the (C1IN0+) input goes below the (C1IN-) input, the phase delay will be removed.

COG Auto Shutdown Fault Input: Whenever the COG1FLT input goes low, the COG1 outputs will be shut off.
The internal weak pull-up is enabled on this pin.

The RA2 pin is configured as an A/D input (channel 2) and is continuously scanned during the main background processing loop.

NOTE: In order to debug this part using all of its I/O pins, use the PIC12F752-ICD Processor Extension Pak (Part No. AC244049)

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Release History

  • Mar 27, 2014

    Version: 1.0.0

    Initial release

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  • Current Version:1.0.0
  • Created:Mar 27, 2014
  • Updated:Feb 26, 2015
  • Downloads:5476
  • MPLAB Version:MPLAB v2.0.0
  • C Compiler:MPLAB XC8 v1.30
  • Development Tools:PICKit3, Low Pin Count Demo Board
  • Supported Devices:PIC12F752

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